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| FQB8N60C / FQI8N60C QFET FQB8N60C / FQI8N60C 600V N-Channel MOSFET General Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology. TM Features * * * * * * 7.5A, 600V, RDS(on) = 1.2 @VGS = 10 V Low gate charge ( typical 28 nC) Low Crss ( typical 12 pF) Fast switching 100% avalanche tested Improved dv/dt capability D D ! G S D2-PAK FQB Series I2-PAK GDS FQI Series G! ! S Absolute Maximum Ratings Symbol VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL TC = 25C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25C) Drain Current - Continuous (TC = 100C) Drain Current - Pulsed (Note 1) FQB8N60C / FQI8N60C 600 7.5 4.6 30 30 (Note 2) (Note 1) (Note 1) (Note 3) Units V A A A V mJ A mJ V/ns W W W/C C C Gate-Source Voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25C)* Power Dissipation (TC = 25C) - Derate above 25C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 230 7.5 14.7 4.5 3.13 147 1.18 -55 to +150 300 Thermal Characteristics Symbol RJC RJA RJA Parameter Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient* Thermal Resistance, Junction-to-Ambient Typ ---Max 0.85 40 62.5 Units C/W C/W C/W * When mounted on the minimum pad size recommended (PCB Mount) (c)2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQB8N60C / FQI8N60C Electrical Characteristics Symbol Parameter TC = 25C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS BVDSS / TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse VGS = 0 V, ID = 250 A ID = 250 A, Referenced to 25C VDS = 600 V, VGS = 0 V VDS = 480 V, TC = 125C VGS = 30 V, VDS = 0 V VGS = -30 V, VDS = 0 V 600 ------0.7 ------1 10 100 -100 V V/C A A nA nA On Characteristics VGS(th) RDS(on) gFS Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance VDS = VGS, ID = 250 A VGS = 10 V, ID = 3.75 A VDS = 40 V, ID = 3.75 A (Note 4) 2.0 --- -1.0 8.7 4.0 1.2 -- V S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz ---965 105 12 1255 135 16 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 480 V, ID = 7.5A, VGS = 10 V (Note 4, 5) VDD = 300 V, ID = 7.5A, RG = 25 (Note 4, 5) -------- 16.5 60.5 81 64.5 28 4.5 12 45 130 170 140 36 --- ns ns ns ns nC nC nC Drain-Source Diode Characteristics and Maximum Ratings IS ISM VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 7.5 A Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 7.5 A, dIF / dt = 100 A/s (Note 4) ------ ---365 3.4 7.5 30 1.4 --- A A V ns C Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 7.3mH, IAS = 7.5 A, VDD = 50V, RG = 25 , Starting TJ = 25C 3. ISD 7.5A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300s, Duty cycle 2% 5. Essentially independent of operating temperature (c)2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQB8N60C / FQI8N60C Typical Characteristics 10 1 ID, Drain Current [A] ID, Drain Current [A] VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V Bottom : 5.0 V Top : 10 1 150 C o 10 0 25 C 10 0 o -55 C o 10 -1 Notes : 1. 250 s Pulse Test 2. TC = 25 -1 Notes : 1. VDS = 40V 2. 250 s Pulse Test 10 10 10 0 -1 10 1 2 4 6 8 10 VDS, Drain-Source Voltage [V] VGS, Gate-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 3.5 10 1 3.0 RDS(ON) [ ], Drain-Source On-Resistance 2.5 VGS = 10V 2.0 IDR, Reverse Drain Current [A] 10 0 1.5 VGS = 20V 1.0 Note : TJ = 25 150 -1 25 Notes : 1. VGS = 0V 2. 250 s Pulse Test 0.5 0 5 10 15 20 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4 ID, Drain Current [A] VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 2000 1800 1600 1400 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 12 10 VDS = 120V VDS = 300V VDS = 480V Ciss VGS, Gate-Source Voltage [V] 8 Capacitance [pF] 1200 1000 800 600 400 200 0 -1 10 Notes ; 1. VGS = 0 V 2. f = 1 MHz Coss 6 4 Crss 2 Note : ID = 8A 0 10 0 10 1 0 5 10 15 20 25 30 VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics (c)2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQB8N60C / FQI8N60C Typical Characteristics (Continued) 1.2 3.0 2.5 BV DSS , (Normalized) Drain-Source Breakdown Voltage RDS(ON) , (Normalized) Drain-Source On-Resistance 1.1 2.0 1.0 1.5 1.0 Notes : 1. VGS = 10 V 2. ID = 4 A 0.9 Notes : 1. VGS = 0 V 2. ID = 250 A 0.5 0.8 -100 -50 0 50 100 o 150 200 0.0 -100 -50 0 50 100 o 150 200 TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature 2 Figure 8. On-Resistance Variation vs Temperature 10 Operation in This Area is Limited by R DS(on) 8 10 s 100 s 1 ms 10 ms 100 ms DC 6 10 1 ID, Drain Current [A] 10 0 10 -1 Notes : 1. TC = 25 C 2. TJ = 150 C 3. Single Pulse o o 10 -2 10 0 10 1 10 2 10 3 ID, Drain Current [A] 4 2 0 25 50 75 100 125 150 VDS, Drain-Source Voltage [V] TC, Case Temperature [] Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current vs Case Temperature 10 0 (t), T h e r m a l R e s p o n s e D = 0 .5 0 .2 10 -1 0 .1 0 .0 5 0 .0 2 0 .0 1 N o te s : 1 . Z J C ( t) = 0 . 8 5 /W M a x . 2 . D u t y F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z J C ( t) JC 10 -2 s in g le p u ls e PDM t1 t2 Z 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11. Transient Thermal Response Curve (c)2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQB8N60C / FQI8N60C Gate Charge Test Circuit & Waveform 50K 12V 200nF 300nF Same Type as DUT VDS VGS Qg 10V Qgs Qgd VGS DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS VGS RG RL VDD VDS 90% 10V DUT VGS 10% td(on) t on tr td(off) t off tf Unclamped Inductive Switching Test Circuit & Waveforms L VDS ID RG DUT tp BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD BVDSS IAS VDD VDD tp ID (t) VDS (t) Time 10V (c)2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQB8N60C / FQI8N60C Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG Same Type as DUT VDD VGS * dv/dt controlled by RG * ISD controlled by pulse period VGS ( Driver ) Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) IRM di/dt Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop (c)2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQB8N60C / FQI8N60C Package Dimensions D2-PAK (0.40) 9.90 0.20 4.50 0.20 1.30 -0.05 +0.10 1.20 0.20 9.20 0.20 15.30 0.30 1.40 0.20 2.00 0.10 0.10 0.15 2.54 0.30 9.20 0.20 Rev. A, October 2003 2.40 0.20 4.90 0.20 (0.75) 1.27 0.10 2.54 TYP 0.80 0.10 2.54 TYP 10.00 0.20 (8.00) (4.40) 0 ~3 +0.10 0.50 -0.05 10.00 0.20 15.30 0.30 (1.75) (2XR0.45) 0.80 0.10 Dimensions in Millimeters (c)2003 Fairchild Semiconductor Corporation 4.90 0.20 (7.20) FQB8N60C / FQI8N60C Package Dimensions (Continued) I2-PAK 9.90 0.20 (0.40) 4.50 0.20 +0.10 1.30 -0.05 1.20 0.20 9.20 0.20 MAX 3.00 (1.46) 13.08 0.20 (0.94) 1.27 0.10 1.47 0.10 0.80 0.10 10.08 0.20 MAX13.40 (4 ) 5 2.54 TYP 2.54 TYP 0.50 -0.05 +0.10 2.40 0.20 10.00 0.20 Dimensions in Millimeters (c)2003 Fairchild Semiconductor Corporation Rev. A, October 2003 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FACT Quiet SeriesTM ActiveArrayTM FAST(R) FASTrTM BottomlessTM FRFETTM CoolFETTM CROSSVOLTTM GlobalOptoisolatorTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM EnSignaTM ImpliedDisconnectTM FACTTM ISOPLANARTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM DISCLAIMER LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) VCXTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness. provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Preliminary No Identification Needed Full Production Obsolete Not In Production (c)2003 Fairchild Semiconductor Corporation Rev. I5 |
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